clock recovery
英 [klɒk rɪˈkʌvəri]
美 [klɑːk rɪˈkʌvəri]
网络 时钟恢复; 时钟再生; 时脉复原; 时脉恢复; 时钟的获取和恢复
双语例句
- Experimental study of optical clock recovery by the application of photonic crystal fiber
光子晶体光纤应用于光时钟恢复的实验研究 - Investigation on Packet Clock Recovery with Fastened Unlocking Time Using an Optical Band-Pass Filter And if the relative velocity of two inertial frames is constant, the compound pendulum in motion runs slower at a same factor than the resting one.
利用光窄带滤波器加快帧时钟消失速度的理论和实验研究两惯性系相对速度一定时，运动的复摆钟都比静止的钟慢了一个相同的因子。 - The Study of Clock Recovery and Demultiplexing Module in 160Gbit/ s OTDM
160Gbit/s光时分复用系统中时钟提取与解复用器模块的研究 - A novel design approach of clock recovery circuit used in optical communication
一种用于光通信的新型时钟提取电路设计 - This paper presents a fully integrated carrier clock recovery circuit for a mobile payment application.
介绍了一个应用在移动支付系统里的全集成载波时钟恢复电路。 - Research and Design of High Speed Clock Recovery Circuit on ASIC
高速时钟恢复电路的ASIC研究与设计 - In this paper, a detailed analysis of a phase interpolator for clock recovery is presented.
分析了应用于时钟恢复电路中的相位插值器。 - Design of a High-speed Integrated PLL for Clock Recovery Circuit
用于时钟恢复电路的高速集成锁相环设计研究 - Research and Implementation of Clock Recovery Algorithm in TDM-over-IP
关于TDMoIP时钟恢复算法的研究与实现 - Rapid carrier and clock recovery is a key technique in burst mode transmission.
快速载波和位时钟恢复是突发模式传送系统的一个关键因素。 - Digital method of adaptive clock recovery in circuit emulation
电路仿真中自适应时钟恢复的数字化方法 - Optical clock recovery is a fundamental part of all optical regeneration technology.
其中全光的时钟恢复是全光再生技术的重要组成部分，是全光再生中定时、整形的基础。 - In this paper, the design of a specific chip for circuit emulation based on IP is put forward and realized and the main functional modules and the key algorithms including an all-digital adaptive clock recovery method and a dynamic depth buffer algorithm are described in detail.
文章根据相关标准提出并实现了一种电路仿真专用芯片的设计方案，并对其中主要功能模块和关键算法作出了详细说明，包括一种全数字的自适应时钟恢复方法、动态深度缓冲算法等。 - An All-Digital Phase Locked Loop for Clock Recovery from E1 Signal
一种从E1信号中提取时钟的全数字锁相环 - In this paper, a clock recovery system that based on phase control technology is studied.
本文设计的锁相环路是基于相位控制技术的时钟恢复系统。 - Clock recovery and 3R regeneration from degraded signals are researched in many laboratories.
如何从码型恶化的数据信号中提取时钟和对恶化的数据信号进行3R全光再生是国际上研究的热点。 - Clock recovery circuit is used to extract clock from the output signal of main amplifier.
时钟恢复电路（CRC）从主放大器输出数据信号中提取出时钟信号供数据判决和后续电路使用。 - Clock Recovery and Audio/ Video Synchronization in Digital TV System
数字电视系统中的时间恢复和音视频同步 - All optical clock recovery is one of the key technologies in the 3R regeneration system.
在全光3R再生系统中，全光位时钟提取是其中的一项关键技术。 - The clock recovery is based on a PLL.
时钟恢复由一个锁相环实现。 - The design of DPLL for clock recovery and digital jitter attenuation
时钟提取与抖动衰减数字锁相环设计研究 - The most difficult problem in burst mode receiver would be signal logic level recovery and data and clock recovery.
在突发式的接收模块中，逻辑电平的恢复和时钟数据的恢复是其关键的问题。 - Pattern conversion is the key technology for all-optical clock recovery from non-return-to-zero ( NRZ) signal.
码型转换是实现非归零（NRZ）信号全光时钟恢复的关键技术。 - Clock Recovery and Audio/ Video synchronization in MPEG-2 System
MPEG-2编解码系统中的时钟恢复和音视频同步 - The clock recovery module can recover the accurate original clock with the help of digital PLL technology. The queue management module can realize the packet loss and the disorder process. The network timing delay absorbing module is realized with the use of dithering buffer.
其中时钟恢复模块在接收端利用数字锁相环技术恢复出精确的发端时钟，队列管理模块完成了对分组丢失和乱序的处理，而网络时延的吸收是通过抖动缓冲区来完成的。 - Through the simulation result, determine the clock recovery circuit performance meet Ethernet requirements.
通过分析仿真结果，确定了该时钟恢复电路的性能满足以太网的要求。 - However, TDM services will be damaged and brought difficulties into service clock recovery when through the packet-based network.
但TDM业务在通过基于分组的网络时会造成损伤，给其业务时钟的恢复带来困难。 - The clock recovery module can recover the accurate original clock with the use of digital PLL technology. The queue management module can realize the packet loss and the disorder process.
时钟恢复模块利用数字锁相环技术恢复出准确的发端时钟，队列管理模块完成对分组丢失和乱序的处理。 - Some circuits, including the synchronous clock recovery circuit, the multiplexing circuit, the demultiplexing circuit and the protocol processing circuit, are designed.
设计了同步时钟恢复电路、复用电路、解复用电路和协议处理电路这四个核心电路。